In a NAND flash memory, a gate of a memory cell, which is disposed in a memory cell array, comprises, for example, a floating gate and a control gate, and the floating gate and the control gate are electrically isolated by an inter-gate insulation film. On the other hand, a gate of a transfer transistor, which is disposed in a peripheral circuit of the memory cell array and configured to transfer a select voltage/non-select voltage to the memory cell, comprises, for example, a floating gate and a control gate which are stacked, but a part of the above-described inter-gate insulation film is removed and the floating gate and the control gate are connected.